ST STM32H7 Series User Manual

PM0214 Rev 9 221/262
PM0214 Core peripherals
261
4.4 System control block (SCB)
The System control block (SCB) provides system implementation information, and system
control. This includes configuration, control, and reporting of the system exceptions.
Table 50. Summary of the system control block registers
Address Name Type
Required
privilege
Reset value Description
0xE000E008 ACTLR RW Privileged 0x00000000
Table 4.4.1: Auxiliary control register (ACTLR) on
page 222
0xE000ED00 CPUID RO Privileged 0x410FC241 Table 4.4.2: CPUID base register (CPUID) on page 224
0xE000ED04 ICSR RW
(1)
Privileged 0x00000000
Table 4.4.3: Interrupt control and state register (ICSR)
on page 225
0xE000ED08 VTOR RW Privileged 0x00000000
Table 4.4.4: Vector table offset register (VTOR) on
page 227
0xE000ED0C AIRCR RW
(1)
Privileged 0xFA050000
Table 4.4.5: Application interrupt and reset control
register (AIRCR) on page 228
0xE000ED10 SCR RW Privileged 0x00000000
Table 4.4.6: System control register (SCR) on
page 230
0xE000ED14 CCR RW Privileged 0x00000200
Table 4.4.7: Configuration and control register (CCR)
on page 231
0xE000ED18 SHPR1 RW Privileged 0x00000000
Table 4.4.8: System handler priority registers (SHPRx)
on page 233
0xE000ED1C SHPR2 RW Privileged 0x00000000
0xE000ED20 SHPR3 RW Privileged 0x00000000
0xE000ED24 SHCSR RW Privileged 0x00000000
Table 4.4.9: System handler control and state register
(SHCSR) on page 235
0xE000ED28 CFSR RW Privileged 0x00000000
Table 4.4.10: Configurable fault status register (CFSR;
UFSR+BFSR+MMFSR) on page 237
0xE000ED28
MMSR
(2)
RW Privileged 0x00
MemManage Fault Status Register Table 4.4.10 on
page 237
0xE000ED29 BFSR
(2)
RW Privileged 0x00 BusFault Status Register Table 4.4.10 on page 237
0xE000ED2A UFSR
(2)
RW Privileged 0x0000 UsageFault Status Register Table 4.4.10 on page 237
0xE000ED2C HFSR RW Privileged 0x00000000
Table 4.4.14: Hard fault status register (HFSR) on
page 241
0xE000ED34 MMAR RW Privileged Unknown
Table 4.4.15: Memory management fault address
register (MMFAR) on page 242
0xE000ED38 BFAR RW Privileged Unknown
Table 4.4.16: Bus fault address register (BFAR) on
page 242
0xE000ED3C AFSR RW Privileged 0x00000000
Table 4.4.17: Auxiliary fault status register (AFSR) on
page 243
1. See the register description for more information.
2. A subregister of the CFSR

ST STM32H7 Series Specifications

General

Brand	ST
Model	STM32H7 Series
Category	Computer Hardware
Language	English