The Cortex-M4 processor PM0214
46/262 PM0214 Rev 9
2.4.2 Fault escalation and hard faults
All faults exceptions except for hard fault have configurable exception priority, as described
in System handler priority registers (SHPRx) on page 233. Software can disable execution
of the handlers for these faults, as described in System handler control and state register
(SHCSR) on page 235.
Usually, the exception priority, together with the values of the exception mask registers,
determines whether the processor enters the fault handler, and whether a fault handler can
preempt another fault handler, as described in Section 2.3: Exception model on page 37.
In some situations, a fault with configurable priority is treated as a hard fault. This is called
priority escalation, and the fault is described as escalated to hard fault. Escalation to hard
fault occurs when:
• A fault handler causes the same kind of fault as the one it is servicing. This escalation
to hard fault occurs when a fault handler cannot preempt itself because it must have
the same priority as the current priority level.
• A fault handler causes a fault with the same or lower priority as the fault it is servicing.
This is because the handler for the new fault cannot preempt the currently executing
fault handler.
• An exception handler causes a fault for which the priority is the same as or lower than
the currently executing exception.
• A fault occurs and the handler for that fault is not enabled.
If a bus fault occurs during a stack push when entering a bus fault handler, the bus fault
does not escalate to a hard fault. This means that if a corrupted stack causes a fault, the
fault handler executes even though the stack push for the handler failed. The fault handler
operates but the stack contents are corrupted.
Only Reset and NMI can preempt the fixed priority hard fault. A hard fault can preempt any
exception other than Reset, NMI, or another hard fault.
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