Core peripherals PM0214
218/262 PM0214 Rev 9
4.3.10 NVIC design hints and tips
Ensure software uses correctly aligned register accesses. The processor does not support
unaligned accesses to NVIC registers. See the individual register descriptions for the
supported access sizes.
An interrupt can enter pending state even it is disabled. Disabling an interrupt only prevents
the processor from taking that interrupt.
Before programming VTOR to relocate the vector table, ensure the vector table entries of
the new vector table are setup for fault handlers, NMI and all enabled exception like
interrupts. For more information see Section 4.4.4: Vector table offset register (VTOR) on
page 227.
NVIC programming hints
Software uses the CPSIE I and CPSID I instructions to enable and disable interrupts. The
CMSIS provides the following intrinsic functions for these instructions:
void __disable_irq(void) // Disable Interrupts
void __enable_irq(void) // Enable Interrupts
In addition, the CMSIS provides a number of functions for NVIC control, including:
The input parameter IRQn is the IRQ number, see Table 17: Properties of the different
exception types on page 38. For more information about these functions see the CMSIS
documentation.
Table 48. CMSIS functions for NVIC control
CMSIS interrupt control function Description
void NVIC_SetPriorityGrouping(uint32_t priority_grouping) Set the priority grouping
void NVIC_EnableIRQ(IRQn_t IRQn) Enable IRQn
void NVIC_DisableIRQ(IRQn_t IRQn) Disable IRQn
uint32_t NVIC_GetPendingIRQ (IRQn_t IRQn)
Return true (IRQ-Number) if IRQn is
pending
void NVIC_SetPendingIRQ (IRQn_t IRQn) Set IRQn pending
void NVIC_ClearPendingIRQ (IRQn_t IRQn) Clear IRQn pending status
uint32_t NVIC_GetActive (IRQn_t IRQn)
Return the IRQ number of the active
interrupt
void NVIC_SetPriority (IRQn_t IRQn, uint32_t priority) Set priority for IRQn
uint32_t NVIC_GetPriority (IRQn_t IRQn) Read priority of IRQn
void NVIC_SystemReset (void) Reset the system
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