ST STM32H7 Series User Manual

PM0214 Rev 9 177/262
PM0214 The STM32 Cortex-M4 instruction set
261
3.10.27 VSTM
Floating-point Store Multiple.
Syntax
VSTM{mode}{cond}{.size} Rn{!}, list
Where:
• ‘mode’ is the addressing mode:
IA Increment After. The consecutive addresses start at the address specified in Rn.
This is the default and can be omitted.
DB Decrement Before. The consecutive addresses end just before the address
specified in Rn.
• ‘cond’ is an optional condition code, see Conditional execution on page 65.
• ‘size’ is an optional data size specifier. If present, it must be equal to the size in bits, 32
or 64, of the registers in list.
• ‘Rn’ is the base register. The SP can be used.
• ‘!’ is the function that causes the instruction to write a modified value back to Rn.
Required if mode == DB.
• ‘list’ is a list of the extension registers to be stored, as a list of consecutively numbered
doubleword or singleword registers, separated by commas and surrounded by
brackets.
Operation
This instruction stores multiple extension registers to consecutive memory locations using a
base address from an Arm core register.
Restrictions
The restrictions are:
• list must contain at least one register.
• If it contains doubleword registers it must not contain more than 16 registers.
• Use of the PC as Rn is deprecated.
Condition flags
These instructions do not change the flags.

ST STM32H7 Series Specifications

General

Brand	ST
Model	STM32H7 Series
Category	Computer Hardware
Language	English