PM0214 Rev 9 119/262
PM0214 The STM32 Cortex-M4 instruction set
261
3.6.7 SMMLA and SMMLS
Signed Most Significant Word Multiply Accumulate and Signed Most Significant Word
Multiply Subtract.
Syntax
op{R}{cond} Rd, Rn, Rm, Ra
Where:
• op is one of the following:
SMMLA: Signed most significant word multiply accumulate.
SMMLS: Signed most significant word multiply subtract.
• R is a rounding error flag. If R is specified, the result is rounded instead of being
truncated, 0x80000000 is added to the product before the high word is extracted.
• ‘cond’ is an optional condition code (see Conditional execution on page 65)
• ‘Rd’ is the destination register.
• ‘Rn’, ‘Rm’ are registers holding the first and second multiply operands
• ‘
Ra
’ is the register holding the accumulate value
Operation
The SMMLA instruction interprets the values from Rn and Rm as signed 32-bit words:
1. Multiplies the values in Rn and Rm.
2. Optionally rounds the result by adding 0x80000000.
3. Extracts the most significant 32 bits of the result.
4. Adds the value of
Ra
to the signed extracted value.
5. Writes the result of the addition in Rd.
The SMMLS instruction interprets the values from Rn and Rm as signed 32-bit words:
1. Multiplies the values in Rn and Rm.
2. Optionally rounds the result by adding 0x80000000.
3. Extracts the most significant 32 bits of the result.
4. Subtracts the extracted value of the result from the value in
Ra
.
5. Writes the result of the subtraction in Rd.
Restrictions
In these instructions: Do not use either SP or PC.
Condition flags
These instructions do not affect the condition code flags.
Examples
SMMLA R0, R4, R5, R6 ; Multiplies R4 and R5, extracts top 32 bits,
; adds R6, truncates and writes to R0
SMMLAR R6, R2, R1, R4 ; Multiplies R2 and R1, extracts top 32 bits,
; adds R4, rounds and writes to R6
SMMLSR R3, R6, R2, R7 ; Multiplies R6 and R2, extracts top 32 bits,
; subtracts R7, rounds and writes to R3
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