PM0214 Rev 9 115/262
PM0214 The STM32 Cortex-M4 instruction set
261
3.6.5 SMLAL and SMLALD
Signed Multiply Accumulate Long, Signed Multiply Accumulate Long (halfwords) and Signed
Multiply Accumulate Long Dual.
Syntax
op{cond} RdLo, RdHi, Rn, Rm
op{XY}{cond} RdLo, RdHi, Rn, Rm
op{X}{cond} RdLo, RdHi, Rn, Rm
Where:
• op is one of the following:
– SMLAL: Signed multiply accumulate long.
– SMLAL: Signed multiply accumulate long (halfwords, X and Y). X and Y specify
which halfword of the source registers Rn and Rm are used as the first and
second multiply operand:
If X is B, then the bottom halfword, bits [15:0], of Rn is used.
If X is T, then the top halfword, bits [31:16], of Rn is used.
If Y is B, then the bottom halfword, bits [15:0], of Rm is used.
If Y is T, then the top halfword, bits [31:16], of Rm is used.
– SMLALD: Signed multiply accumulate long Dual.
– SMLALDX: Signed multiply accumulate long dual reversed:
If the X is omitted, the multiplications are bottom × bottom and top × top.
If X is present, the multiplications are bottom × top and top × bottom.
• ‘cond’ is an optional condition code (see Conditional execution on page 65)
• ‘RdHi, RdLo’ are the destination registers. RdLo is the lower 32 bits and RdHi is the
upper 32 bits of the 64-bit integer. For SMLAL, SMLALBB, SMLALBT, SMLALTB,
SMLALTT, SMLALD and SMLALDX, they also hold the accumulating value.
• ‘Rn’, ‘Rm’ are registers holding the first and second operands
Operation
The SMLAL instruction:
1. Multiplies the two’s complement signed word values from Rn and Rm.
2. Adds the 64-bit value in RdLo and RdHi to the resulting 64-bit product.
3. Writes the 64-bit result of the multiplication and addition in RdLo and RdHi.
The SMLALBB, SMLALBT, SMLALTB and SMLALTT instructions:
1. Multiplies the specified signed halfword, top or bottom, values from Rn and Rm.
2. Adds the resulting sign-extended 32-bit product to the 64-bit value in RdLo and RdHi.
3. Writes the 64-bit result of the multiplication and addition in RdLo and RdHi.
The non-specified halfwords of the source registers are ignored.