PM0214 Rev 9 159/262
PM0214 The STM32 Cortex-M4 instruction set
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3.10.9 VFNMA, VFNMS
Floating-point Fused Negate Multiply Accumulate and Subtract.
Syntax
VFNMA{cond}.F32 {Sd,} Sn, Sm
VFNMS{cond}.F32 {Sd,} Sn, Sm
Where:
• ‘cond’ is an optional condition code, see Conditional execution on page 65.
• ‘Sd’ is the destination register
• ‘Sn, Sm’ are the operand registers.
Operation
The VFNMA instruction:
1. Negates the first floating-point operand register.
2. Multiplies the first floating-point operand with second floating-point operand.
3. Adds the negation of the floating -point destination register to the product
4. Places the result into the destination register.
The result of the multiply is not rounded before the addition.
The VFNMS instruction:
1. Multiplies the first floating-point operand with second floating-point operand.
2. Adds the negation of the floating-point value in the destination register to the product.
3. Places the result in the destination register.
The result of the multiply is not rounded before the addition.
Restrictions
There are no restrictions.
Condition flags
These instructions do not change the flags.