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7. UltraSPARC External Interfaces
If the Writeback is to be cancelled because of an intervening invalidation
(S_CPI_REQ or S_INV_REQ) for the victimized datum (due to a P_RDO_REQ or
P_WRI_REQ from another UltraSPARC), SC cancels the Writeback with
S_WBCAN and no data is written.
If the Writeback is not cancelled, SC issues S_WAB and UltraSPARC drives the
64-byte block of data aligned on a 64-byte boundary (A<5:4>=0) onto SYSDATA.
See Section 7.11, “Writeback Issues,” for more information about Writeback.
7.7.5.1 Error Handling
Since UltraSPARC always pairs a Writeback and a read with DVP set, the Write-
back is issued even if the read terminates with error. It is illegal for SC to respond
to Writeback with S_RTO or S_ERR; that is, the Writeback transaction always
completes with S_WAB or S_WBCAN. SC uses interrupts to report write failures.
7.7.6 WriteInvalidate (P_WRI_REQ)
Coherent Write and Invalidate request. Generated by UltraSPARC for a block
store to an S, O, or I state line or a block store commit to a line in any state. This
transaction is used to inject new data directly into the coherence domain; there is
no victim read transaction associated with this request.
The P_WRI_REQ packet contains an Invalidate me Advisory (IVA) bit, which
specifies whether SC must send an S_INV_REQ back to the requesting processor.
The IVA bit is ignored in systems that support Dtags.
After all invalidations have been acknowledged, SC issues S_WAB to the master
UltraSPARC to drive the 64-byte block of data aligned on a 64-byte boundary
(A<5:4>=0) onto SYSDATA.
UltraSPARC can issue up to two outstanding WriteInvalidate transactions.
7.7.6.1 Error Handling
It is illegal for SC to respond to a WriteInvalidate request with S_RTO or S_ERR.
SC reports write errors with interrupts.
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