Sun Microelectronics
139
7. UltraSPARC External Interfaces
7.17.1 Request Packets
The SYSADDR bus is a 36-bit transaction request bus with one odd-parity bit
(SYADDR<35>. The request packet comprises 72 bits and is carried on SYSADDR
in two successive interconnect clock cycles.
Figure 7-31 shows the P_REQ and S_REQ types.
Figure 7-31 Transaction Types
Figures 7-32, 7-33, and 7-34 show the transaction request packet formats.
Packet Type
Initiated by UltraSPARC
Cache Coherent
P_RDS_REQ
P_RDSA_REQ
P_RDO_REQ
Non-Cached
P_NCWR_REQ
Initiated by SC
Cache Coherent
S_INV_REQ
S_CPB_REQ
S_CPI_REQ
P_WRI_REQ
S_CPD_REQ
P_RDD_REQ
P_NCRD_REQ
P_INT_REQ
P_WRB_REQ
P_NCBWR_REQ
P_NCBRD_REQ
Interrupt
Non-Cached
P_NCRD_REQ
P_INT_REQ
P_NCBRD_REQ
Interrupt
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