Sun Microsystems UltraSPARC-I - Page 155

Sun Microelectronics
140
UltraSPARC User’s Manual
Figure 7-32 Packet Format: Coherent P_REQ and S_REQ Transactions
Figure 7-33 Packet Format: Noncached P_REQ Transactions
Figure 7-34 Packet Format: P_INT_REQ Transaction
Transaction Type
Physical Address<38:14>
28
31
29
Master ID
First Cycle
35
34
30
35
29
Parity
12
24
33
Class
Physical Address<40:39>
Parity
0
24
25
DVP
34
28
27
25
23
IVA
Physical Address<16:4>
Reserved
22-13
NDP
33
Physical Address<8:6>
Class
0
Reserved
Second Cycle
Master ID
35
29
Parity
Physical Address<16:4>
12
ByteMask<15:0>
33
Class
0
34
28
13
Transaction Type
Physical Address<38:14>
28
31
29
35
34
30
Physical Address<40:39>
Parity
0
24
25
33
Physical Address<8:6>
Class
First Cycle Second Cycle
Transaction Type
28
29
Master ID<4:0>
35
34
35
29
Parity
Reserved
33
Class
Don’t Care
Parity
0
24
25
34
28
12
Class
33
Don’t Care
Target ID<4:0>=PA<18:14>
Don’t Care
13
0
4
5
First Cycle Second Cycle
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