Sun Microsystems UltraSPARC-I - Page 224

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209
13. UltraSPARC Extended Instructions
13.5.4.1 FMUL8x16
FMUL8x16 multiplies each unsigned 8-bit value (i.e., a pixel) in rs1 by the corre-
sponding (signed) 16-bit fixed-point integers in rs2; it rounds the 24-bit product
(assuming a binary point between bits 7 and 8) and stores the upper 16 bits of the
result into the corresponding 16-bit field in the rd register. Figure 13-8 illustrates
the operation.
Note: This instruction treats the pixel values as fixed-point with the binary
point to the left of the most significant bit. Typically, this operation is used with
filter coefficients as the fixed-point rs2 value and image data as the rs1 pixel
value. Appropriate scaling of the coefficient allows various fixed-point scaling to
be realized.
Figure 13-8 FMUL8x16 Operation
13.5.4.2 FMUL8x16AU
FMUL8x16AU is the same as FMUL8x16, except that one 16-bit fixed-point value
is used for all four multiplies. This value is the most significant 16 bits of the
32-bit rs2 register, which is typically an α value. The operation is illustrated in
Figure 13-9 on page 210.
3
rd
rs1
1
1
5
2
30
7
6
3
4
7
rs2
*
msb
*
msb
*
msb
*
msb
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