Sun Microelectronics
258
UltraSPARC User’s Manual
15.2.3 RMO
UltraSPARC implements the following programmer-visible properties in Relaxed
Memory Order (RMO) mode:
• There is no implicit order between any two memory references, either
cacheable or non-cacheable, except that non-cacheable accesses with the E-bit
set (that is, those having side-effects) are all strongly ordered with respect to
each other.
• A MEMBAR must be used between cacheable memory references if stronger
order is desired. A MEMBAR #MemIssue is needed for ordering of cacheable
after non-cacheable accesses. A MEMBAR #Lookaside should be used
between a store and a subsequent load at the same noncacheable address.
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