Sun Microelectronics
15
2. Processor Pipeline
The physical address of a store is sent to the Store Buffer during this stage. To
avoid pipeline stalls when store data is not immediately available, the store ad-
dress and data parts are decoupled and sent to the Store Buffer separately.
FLOATING-POINT AND GRAPHICS UNIT: The X
2
stage of the FGU. Execution contin-
ues for most operations.
2.2.7 Stage 7: N
2
Stage
Most floating-point instructions finish their execution during this stage. After N
2
,
data can be bypassed to other stages or forwarded to the data portion of the Store
Buffer. All loads that have entered the Load Buffer in N
1
continue their progress
through the buffer; they will reappear in the pipeline only when the data comes
back. Normal dependency checking is performed on all loads, including those in
the load buffer.
FLOATING-POINT AND GRAPHICS UNIT: The X
3
stage of the FGU.
2.2.8 Stage 8: N
3
Stage
UltraSPARC resolves traps at this stage.
2.2.9 Stage 9: Write (W) Stage
All results are written to the register files (integer and floating-point) during this
stage. All actions performed during this stage are irreversible. After this stage, in-
structions are considered terminated.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
To Next Page
Loading...