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313
A. Debug and Diagnostics Support
Undefined, und: The value of these bits are undefined on reads and must be
masked off by software.
IC_lru: Selects the least recently accessed set of the line corresponding to
IC_addr. There is only one physical lru bit per IC_addr value (i.e. cache
line). The IC_lru field can be read for each value of IC_set and IC_line,
but can only be written when IC_set is zero.
Note: The LRU bit is not updated when instructions are accessed with
ASI_ICACHE_INSTR.
IC_brpd<1:0>: Two 2-bit dynamic branch prediction fields. The encodings are:
• IC_brpd<1> If set, strong prediction
• IC_brpd<0> If set, taken prediction
During I-Cache miss processing, IC_brpd is initialized to likely-taken if either of
the corresponding instructions is a branch with static prediction bit set; other-
wise, IC_brpd is set to likely-not-taken. The prediction bits are subsequently up-
dated according to the dynamic branch history of the corresponding instructions,
as shown in Figure A-15. (Note: This figure is identical to Figure 16-6.)
Figure A-15 Dynamic Branch Prediction State Diagram
IC_sp 1-bit Set-Prediction (SP) field. Predicts the next set to prefetch after
prefetching from the correspond.
IC_nfa 11-bit Next-Field-Address field (NFA<10:0> = VA<13:3>). Selects the next
line and instruction offset within the line to fetch from.
PT/ANT
PT/AT PNT/AT
ST LT LNT SNT
PT,AT
PT/ANT
PNT/AT
PNT/ANT
PNT/ANT
Initialization
PT: Predicted Taken
PNT: Predicted Not Taken
AT: Actual Taken
ANT: Actual Not Taken
ST: Strongly Taken
LT: Likely Taken
SNT: Strongly Not Taken
LNT: Likely Not Taken
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