Sun Microsystems UltraSPARC-I - Page 358

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E. Pin and Signal Descriptions
E.3.2 UltraSPARC Data Buffer (UDB) Signals
1
. E_BUS_CLKA present only in UltraSPARC-II.
2
. E_BUS_CLKB present only in UltraSPARC-II.
Table E-9 UltraSPARC Data Buffer (UDB) Signals
Function Name Count I/O
Data Transfer
E-Cache Data Bus EDATA<63:0> 64 I/O
E-Cache Data Bus Parity EDPAR<7:0> 8 I/O
System Data Bus SYSDATA<63:0> 64 I/O
System Data Bus ECC SYSECC<7:0> 8 I/O
Error Reporting
Correctable Error UDB_CE 1 O
Uncorrectable Error UDB_UE 1 O
Controls
System Reply S_REPLY<3:0> 4 I
System Identification SYSID<4:0> 5 I
System Clock Input A SYSCLKA 1 I
System Clock Input B SYSCLKB 1 I
External Event EXT_EVENT 1 I
Phase Lock Loop Bypass PLL_BYPASSS 1 I
Reset RESET 1 I
UDB Control (from CPU) UDB_CNTL<4:0> 5 I
UDB High (vs. Low) UDB_H 1 I
System Data Stall SC_DATA_STALL 1 I
System ECC Valid SC_ECC_VALID 1 I
E$ Bus Clock E_BUS_CLKA
1
1I
E$ Bus Clock E_BUS_CLKB
2
1I
IEEE 1149.1 (JTAG) Interface
IEEE 1149.1 Test Data Out TDO 1 O
IEEE 1149.1 Test Data Input TDI 1 I
IEEE 1149.1 Test Clock Input TCK 1 I
IEEE 1149.1 Test Mode Select TMS 1 I
IEEE 1149.1 Test Reset Input TRST_L 1 I
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