Sun Microelectronics
359
. Glossary
may:
A key word indicating flexibility of choice with no implied preference.
Memory Management Unit (MMU):
An MMU is a mechanism that implements a policy for address translation
and protection among contexts. See also virtual address, physical address,
and context.
module:
A master or slave device that attaches to the shared-memory bus.
next program counter (nPC):
A register that contains the address of the instruction to be executed next, if a
trap does not occur.
non-privileged:
An adjective that describes (1) the state of the processor when
PSTATE.PRIV=0, i.e., non-privileged mode; (2) processor state that is accessi-
ble to software while the processor is in either privileged mode or non-privi-
leged mode; e.g., non-privileged registers, non-privileged ASRs, or, in
general, non-privileged state; (3) an instruction that can be executed when the
processor is in either privileged mode or non-privileged mode.
non-privileged mode:
The mode in which processor is operating when PSTATE.PRIV=0. See also
privileged.
NWINDOWS:
The number of register windows present in a particular implementation.
optional:
A feature not required for SPARC-V9 compliance.
physical address:
An address that maps real physical memory or I/O device space. See also vir-
tual address.
prefetchable:
A memory location for which the system designer has determined that no
undesirable effects will occur if a PREFETCH operation to that location is
allowed to succeed. Typically, normal memory is prefetchable.
Non-prefetchable locations include those that, when read, change state or
cause external events to occur. For example, some I/O devices are designed
with registers that clear on read; others have registers that initiate operations
when read. See side effect.
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