EasyManua.ls Logo

Sun Microsystems UltraSPARC-I - Page 392

Sun Microsystems UltraSPARC-I
410 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Sun Microelectronics
377
I Index
graphics instructions 293
Graphics Status Register (GSR) 197, 304
Graphics Unit (GRU) 7
illustrated 5
Group (G) Stage
illustrated 11
group break 287
Grouping (G) Stage 13
grouping rules
general 282
H
hardware errors
fatal 40
hardware interrupts 253
hardware table walking 47
hardware_error floating-point trap type 246, 358
hiding cache misses 8
high-water mark
for stores 278
I
I/0 devices 278
I/O access 38
I/O accesses 33
I/O control registers 30
I/O memory 256
IC, see I-Cache Enable (IC) field of LSU_Control_
Register
I-Cache 17, 94, 170, 177, 266, 277, 306, 309
access statistics 323
disabled in RED_state 169
flush 28
miss 283, 324
miss latency 267
miss processing 313
utilization 270
I-Cache coherency 18
I-Cache diagnostic accesses 50
I-Cache Enable (IC) field of LSU_Control_
Register 177, 306
I-Cache hit 17
I-Cache Instruction Access Address 310
illustrated 310
I-Cache Instruction Access Data 310
illustrated 310
I-Cache miss processing 265
I-Cache organization 262
illustrated 262, 309
I-Cache Predecode Field Access Address 311
illustrated 311
I-Cache Predecode Field Access Data 311
I-Cache Predecode Field LDDA Access Data
illustrated 311
I-Cache Predecode Field STXA Access Data
illustrated 311
I-Cache Tag/Valid Access Address
illustrated 310
I-Cache Tag/Valid Access Data
illustrated 311
I-Cache Tag/Valid Field Access Address 310
I-Cache Tag/Valid Field Access Data 311
I-Cache timing 265
ICRF, see Integer Core Register File (ICRF)
ID, see Modeul Identification (ID) field of UPA_
PORT_ID register
IE, see Interrupt Enable (IE) field of PSTATE register
IEEE Std 1149.1-1990 329
IEEE Std 754-1985 245
IEEE_754_exception floating-point trap
type 246, 358
IEU
0
pipeline 284
IEU
1
pipeline 284
IG, see Interrupt Global (IG) field of PSTATE register
illegal address aliasing 28
illegal_instruction
trap 156 to157, 159,167, 226, 231,
235, 238, 247 to 249, 253
ILLTRAP instructions 235
IM, see Enable I-MMU (IM) field of LSU_Control_
Register
image compression algorithms 3
image processing 3
two-demensional 7
two-dimensional 7
I-MMU 52
disabled in RED_state 169
I-MMU disabled 38
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com

Table of Contents