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Sun Microsystems UltraSPARC-I - Page 393

Sun Microsystems UltraSPARC-I
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Sun Microelectronics
378
UltraSPARC User’s Manual I
I-MMU Enable bit 54
IMPDEP1 instruction 199
impl field of VER register 241
impl, see Implementation (impl) field of VER register
implementation dependency 10
implementation-dependent 358
inclusion 28
Incoming Interrupt Vector Data registers 116
Incoming System Address Parity Error (ISAP)
field of AFSR 181
Incoming UPA Transaction Error Enable
(ISAPEN) field of ASI_ESTATE_ERROR_
EN_REG register 180
initialization requirements 170
instruction alignment for grouping logic 263
instruction breakpoint 305
Instruction Buffer 6,13
illustrated 5
instruction buffer 265, 267, 273, 282 to 283, 285,
288
Instruction Cache (I-Cache) 13
illustrated 5
Instruction Cache (I-Cache) 6
miss 8
instruction dispatch 283, 304
instruction grouping
anti-dependency constraints 282
input dependency constraints 282
output dependency constraints 282
read-after-write dependency
constraints 282
write-after-read dependency
constraints 282
write-after-write dependency
constraints 282
instruction prefetch 34
to side-effect locations 38
when exiting RED_state 39
instruction pre-fetch buffers 34
instruction set architecture 358
instruction termination 15
Instruction Translation Lookaside Buffer
(iTLB) 5, 8, 170
illustrated 5
instruction Translation Lookaside Buffer
(iTLB) 17
Instruction Translation Lookaside Buffer (iTLB)
misses 267
instruction_access_error
exception 122
instruction_access_error
trap 39, 158, 170, 176, 178
to 180, 252
instruction_access_exception
trap 44, 47 to 48, 54,
58, 158, 238 to 239
instruction_access_MMU_miss
trap 46, 48, 58, 60
instructions
block load 3
block store 3
instructions per cycle (IPC) 3
INT_DIS, see Interrupt Disable (INT_DIS) field of
TICK_CMPR register
Integer Core Register File (ICRF) 13
integer divider 7
integer division 241
Integer Executioin Unit (IEU) 284
pipelines 284
Integer Execution Unit (IEU) 7
illustrated 5
integer multiplication 241
integer multiplier 7
integer pipeline 7, 11
integer register file 15, 240, 284
interconnect master 102
UltraSPARC-I 74
interconnect packet formats 138
interconnect packet types
illustrated 139
interconnect slave
UltraSPARC-I 75
interconnect transaction 93
class bit 141
interconnect transaction type
encodings 141
interconnect transactions 92
interconnect_ECC_Valid signal 123
interconnection topology 84
interleaved D-Cache hits and misses to same sub-
block 277
interlocks 13
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