C2000 Microcontroller Workshop - Control Law Accelerator 10 - 1
Control Law Accelerator
Introduction
This module explains the operation of the control law accelerator (CLA). The CLA is an
independent, fully programmable, 32-bit floating-point math processor that enables concurrent
execution into the C28x family. This extends the capabilities of the C28x CPU by adding parallel
processing. The CLA has direct access to the ADC result registers, and all ePWM, HRPWM,
eCAP, eQEP and comparator registers. This allows the CLA to read ADC samples “just-in-time”
and significantly reduces the ADC sample to output delay enabling faster system response and
higher frequency operation. Utilizing the CLA for time-critical tasks frees up the CPU to perform
other system and communication functions concurrently.
Module Objectives
Module Objectives
Explain the purpose and operation of the
Control Law Accelerator (CLA)
Describe the CLA initialization procedure
Review the CLA registers, instruction set,
and programming flow
The control law accelerator is an independent, 32-bit, floating-point, math accelerator. It
executes algorithms independently and in parallel with the CPU. It has direct access to the
ePWM, high-resolution PWM, eCAP, eQEP, ADC result and comparator registers. It responds to
peripheral interrupts independently of the CPU and frees up the CPU for other tasks, such as
communications and diagnostics.
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