Fast Interrupt Response
C2000 Microcontroller Workshop - Architecture Overview 1 - 11
Fast Interrupt Response
The fast interrupt response, with automatic context save of critical registers, resulting in a device
that is capable of servicing many asynchronous events with minimal latency. F28x implements a
zero cycle penalty to do 14 registers context saved and restored during an interrupt. This feature
helps reduces the interrupt service routine overheads.
F28x Fast Interrupt Response Manager
96 dedicated PIE
vectors
No software decision
making required
Direct access to RAM
vectors
Auto flags update
Concurrent auto
context save
28x CPU Interrupt logic
28x
CPU
INTM
96
Peripheral Interrupts 12x8 = 96
12 interrupts
INT1 to
INT12
PIE
Register
Map
PIE module
For 96
interrupts
T ST0
AH AL
PH PL
AR1 (L) AR0 (L)
DP ST1
DBSTAT IER
PC(msw) PC(lsw)
Auto Context Save
IFR IER
The C2000 devices feature a very fast interrupt response manager using the PIE block. This
allows up to 96 possible interrupt vectors to be processed by the CPU. More details about this
will be covered in the reset, interrupts, and system initialization modules.