Texas Instruments C2000 Workshop Guide And Lab Manual

Interrupts
4 - 10 C2000 Microcontroller Workshop - Reset and Interrupts
Interrupt Processing
 A valid signal on a specific interrupt line causes the latch
to display a “1” in the appropriate bit
Maskable Interrupt Processing
Conceptual Core Overview
1
0
1
(IFR)
“Latch”
INT14
INT1
INT2
Core
Interrupt
F28x
Core
(INTM)
“Global Switch”
(IER)
“Switch”
 If the individual and global switches are turned “on” the
interrupt reaches the core
It is easier to explain the interrupt processing flow from the core back out to the interrupt sources.
The INTM is the master interrupt switch. This switch must be closed for any interrupts to
propagate into the core. The next layer out is the interrupt enable register. The appropriate
interrupt line switch must be closed to allow an interrupt through. The interrupt flag register gets
set when an interrupt occurs. Once the core starts processing an interrupt, the INTM switch
opens to avoid nested interrupts and the flag is cleared.
The core interrupt registers consists of the interrupt flag register, interrupt enable register, and
interrupt global mask bit. Notice that the interrupt global mask bit is zero when enabled and one
when disabled. The interrupt enable register is managed by ORing and ANDing mask values.
The interrupt global mask bit is managed using inline assembly.

Texas Instruments C2000 Specifications

General

Brand	Texas Instruments
Model	C2000
Category	Microcontrollers
Language	English