Direct Memory Access (DMA)
9 - 4 C2000 Microcontroller Workshop - Direct Memory Access Controller
Basic Operation
Simplified State Machine Operation
Burst Size times
Transfer Size times
The DMA state machine at its most basic
level is two nested loops
End Transfer
Move Word
Start Transfer
DMA can be configured to
re-initialize at the end of the
transfer (continuous mode)
Basic Address Control Registers
SRC_ADDR
SRC_ADDR_SHADOW
DST_ADDR
DST_ADDR_SHADOW
SRC_BURST_STEP
SRC_TRANSFER_STEP
DST_BURST_STEP
DST_TRANSFER_STEP
Active pointers
Pointer shadow registers
copied to active pointers at
start of transfer
Signed value added to active
pointer after each word
Signed value added to active
pointer after each burst
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