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Direct Memory Access (DMA)

9 - 10 C2000 Microcontroller Workshop - Direct Memory Access Controller

DMA vs. CPU Access Arbitration

 DMA has priority over CPU



If a multi-cycle CPU access is already in

progress, DMA stalls until current CPU

access finishes

The DMA will interrupt back-to-back CPU

accesses

 Can the CPU be locked out?



Generally No!

DMA is multi-cycle transfer; CPU will sneak

in an access when the DMA is accessing the

other end of the transfer (e.g. while DMA

accesses destination location, the CPU can

access the source location)

DMA Registers

DmaRegs.name (lab file: Dma.c)

DMACTRL DMA Control Register

PRIORITYCTRL1 Priority Control Register 1

MODE Mode Register

CONTROL Control Register

BURST_SIZE Burst Size Register

BURST_COUNT Burst Count Register

SRC_BURST_STEP Source Burst Step Size Register

DST_BURST_STEP Destination Burst Step Size Register

TRANSFER_SIZE Transfer Size Register

TRANSFER_COUNT Transfer Count Register

SRC_TRANSFER_STEP Source Transfer Step Size Register

DST_TRANSFER_STEP Destination Transfer Step Size Register

SRC_ADDR_SHADOW Shadow Source Address Pointer Register

SRC_ADDR Active Source Address Pointer Register

DST_ADDR_SHADOW Shadow Destination Address Pointer Register

DST_ADDR Active Destination Address Pointer Register

DMA CHx Registers

For a complete list of registers refer to the DMA Module Reference Guide

Texas Instruments C2000 Workshop Guide And Lab Manual

Other manuals for Texas Instruments C2000