External Interrupts
3 external interrupt signals: XINT1, XINT2
and XINT3
XINT1, XINT2 and XINT3 can be mapped to
any of GPIO0-31
XINT1, XINT2 and XINT3 also each have a
free-running 16-bit counter that measures
the elapsed time between interrupts
The counter resets to zero each time the
interrupt occurs
External Interrupt Registers
Pin Selection Register chooses which pin the signal comes out on
Only one pin can be assigned to each interrupt signal
Configuration Register controls the enable/disable and polarity
Counter Register holds the interrupt counter
Interrupt Pin Selection Register Configuration Register Counter Register
(GpioIntRegs.register) (XIntruptRegs.register) (XIntruptRegs.register)
XINT1 GPIOXINT1SEL XINT1CR XINT1CTR
XINT2 GPIOXINT2SEL XINT2CR XINT2CTR
XINT3 GPIOXINT3SEL XINT3CR XINT3CTR