Select SCI Registers
Control 1
ScixRegs.SCICTL1
Reset, Transmitter / Receiver Enable
TX Wake-up, Sleep, RX Error Interrupt Enable
Control 2
ScixRegs.SPICTL2
TX Buffer Full / Empty Flag, TX Ready Interrupt Enable
RX Break Interrupt Enable
Receiver Status
ScixRegs.SCIRXST
Error Flag, Ready, Flag Break-Detect Flag, Framing
Error Detect Flag, Parity Error Flag, RX Wake-up
Detect Flag
FIFO Transmit
ScixRegs.SCIFFTX
FIFO Receive
ScixRegs.SCIFFRX
FIFO Enable, FIFO Reset
FIFO Over-flow flag, Over-flow Clear
Number of Words in FIFO (FIFO Status)
FIFO Interrupt Enable, Interrupt Status, Interrupt Clear
FIFO Interrupt Level (Number of Words in FIFO)
Note: refer to the reference guide for a complete listing of registers
SCI Summary
Asynchronous communications format
65,000+ different programmable baud rates
Two wake-up multiprocessor modes
Idle-line wake-up & Address-bit wake-up
Programmable data word format
1 to 8 bit data word length
1 or 2 stop bits
even/odd/no parity
Error Detection Flags
Parity error; Framing error; Overrun error; Break detection
Transmit FIFO and receive FIFO
Individual interrupts for transmit and receive