Xilinx MicroBlaze - Page 160

MicroBlaze Processor Reference Guide 161
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 3: MicroBlaze Signal Interface Description
Back-to-Back Mixed Write/Read Operation
X-Ref Target - Figure 3-10
Figure 3-10: Back-to-Back Mixed Write/Read Operation, 0 Wait States
A0 A1 A2
BE0 BE2
D0 D2
D1
Don’t Care
Clk
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Wirte_Strobe
Data_Read
Ready
Wait
CE
UE
X19794-091217
X-Ref Target - Fig ure 3-11
Figure 3-11: Back-to-Back Mixed Write/Read Operation, N Wait States
A0 A1 A2
BE0 BE2
D0 D2
D1
Don’t Care Don’t Care Don’t Care
Clk
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Wirte_Strobe
Data_Read
Ready
Wait
CE
UE
X19795-091217
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