YOKOGAWA DLM3024 User Manual

2-5
IM DLM3054-01EN
Assignment(Assignment)
You can set whether to apply the state display separately for the bus and each bit. You can also set them all at
once.
Source Bit (Source Bit)
Set this when the clock source is set to LOGIC. Select from the following.
Bit0 to Bit7
Setting the Display Order of Bits and the Bus (Bit Order)
Set the vertical display order of bits and the bus on the screen. Select the bit or bus to move and then specify
the destination.
Deskew (Deskew)
You can adjust for the time offsets (skew) between the logic signal and other signals, which are caused by the
use of different types of probes, to measure signals. Deskewing of the logic signal is performed on all eight bits
collectively.
Range: −1000.0 ns to 1000.0 ns (0.01 ns resolution)
2 Vertical Axis (Logic Signal)

YOKOGAWA DLM3024 Specifications

General

Brand	YOKOGAWA
Model	DLM3024
Category	Test Equipment
Language	English