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YOKOGAWA DLM3024 User Manual

YOKOGAWA DLM3024
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4-52
IM DLM3054-01EN
Bit Rate (Bit Rate)
Select the CXPI bus signal’s transfer rate from one of the settings below.
4800bps, 9600bps, 19200bps, User Define
If you select User Define, set the transfer rate in the range of 4000 bps to 50000 bps in 10-bps steps.
T Sample(T Sample)
Set the sum value, T Sample, for determining the logical value of the current bit.
The value in which T Sample is added to the low width of logical value 1 detected with the last bit is used as the
threshold to determine the value as follows:
Logical value 1 when the low width of the current bit is less than or equal to the threshold
Logical value 0 when the low width of the current bit is greater than the threshold
Selectable range: 0.010 Tbit to 0.300 Tbit
Resolution: 0.001 Tbit
* Tbit is the time width of a bit calculated from the bit rate.
Clock Tolerance(Clock Tolerance)
Set the tolerance of the clock width calculated from the bit rate.
Selectable range: ±0.5% to ±5.0%
Resolution: 0.1%
Level (Level), HF Rejection (HF Rejection)
Set these items for the trigger source.
These items are the same as those of the edge trigger.
Hysteresis (Hysteresis)
This item is the same as that of the CAN bus trigger.
4 Triggering

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YOKOGAWA DLM3024 Specifications

General IconGeneral
BrandYOKOGAWA
ModelDLM3024
CategoryTest Equipment
LanguageEnglish

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