Chapter A: Transaction Layer Packet (TLP) Header Formats A–3
TLP Packet Format with Data Payload
November 2011 Altera Corporation Cyclone V Hard IP for PCI Express
User Guide
TLP Packet Format with Data Payload
Table A–10 through A–4 show the content for TLPs with a data payload.
Byte 8
Requester ID Tag
0
Lower Address
Byte 12 Reserved
Table A–9. Completion Locked without Data
Table A–10. Memory Write Request, 32-Bit Addressing
+0 +1 +2 +3
76543210765432107 6 54321076543210
Byte 0 010000000
TC
0000
TD EP
Att
r
00
Length
Byte 4
Requester ID Tag Last BE First BE
Byte 8
Address[31:2]
00
Byte 12 Reserved
Table A–11. Memory Write Request, 64-Bit Addressing
+0 +1 +2 +3
76543210765432107 6 5 4 321076543210
Byte 0 011000000
TC
0000
TD EP
Att
r
00
Length
Byte 4
Requester ID Tag Last BE First BE
Byte 8
Address[63:32]
Byte 12
Address[31:2]
00
Table A–12. Configuration Write Request Root Port (Type 1)
+0 +1 +2 +3
76543210765432107 6 5 43 21 07 65 43 21 0
Byte 0 0100010100000000
TD EP
00000000000001
Byte 4
Requester ID Tag
0000
First BE
Byte 8
Bus Number Device No
0000
Ext Reg Register No
00
Byte 12 Reserved
Table A–13. I/O Write Request
+0 +1 +2 +3
76543210765432107 6 5 43 21 07 65 43 21 0
Byte 0 0100001000000000
TD EP
00000000000001
Byte 4
Requester ID Tag
0000
First BE
Byte 8
Address[31:2]
00
Byte 12 Reserved