Altera Cyclone V - LMI Read Operation; LMI Write Operation

Chapter 5: IP Core Interfaces 5–29
LMI Signals
November 2011 Altera Corporation Cyclone V Hard IP for PCI Express
User Guide
LMI Read Operation
Figure 5–17 illustrates the read operation.
LMI Write Operation
Figure 5–18 illustrates the LMI write. Only writeable configuration bits are
overwritten by this operation. Read-only bits are not affected. LMI write operations
are not recommended for use during normal operation with the exception of AER
header logging.
lmi_addr 15 I Address inputs, [1:0] not used
lmi_din 32 I Data inputs
Table 5–16. LMI Interface (Part 2 of 2)
Signal Width Dir Description
Figure 5–17. LMI Read
pld_clk
lmi_rden
lmi_addr[14:0]
lmi_dout[31:0]
lmi_ack
Figure 5–18. LMI Write
coreclkout
lmi_wren
lmi_din[31:0]
lmi_addr[14:0]
lmi_ack