Altera Cyclone V - Data Link Layer

4–6 Chapter 4: IP Core Architecture
Protocol Layers
Cyclone V Hard IP for PCI Express November 2011 Altera Corporation
Data Link Layer
The Data Link Layer (DLL) is located between the Transaction Layer and the Physical
Layer. It maintains packet integrity and for communicates (by DLL packet
transmission) at the PCI Express link level (as opposed to component communication
by TLP transmission in the interconnect fabric).
The DLL implements the following functions:
■ Link management through the reception and transmission of DLL packets (DLLP),
which are used for the following functions:
■ For power management of DLLP reception and transmission
■ To transmit and receive ACK / NACK packets
■ Data integrity through generation and checking of CRCs for TLPs and DLLPs
■ TLP retransmission in case of NAK DLLP reception using the retry buffer
■ Management of the retry buffer
■ Link retraining requests in case of error through the Link Training and Status State
Machine (LTSSM) of the Physical Layer
Figure 4–3 illustrates the architecture of the DLL.
Figure 4–3. Data Link Layer
To Transaction Layer
Tx Transaction Layer
Packet Description & Data
Transaction Layer
Packet Generator
Retry Buffer
To Physical Layer
Tx Packets
Ack/Nack
Packets
RX Datapath
TX Datapath
Rx Packets
DLLP
Checker
Transaction Layer
Packet Checker
DLLP
Generator
Tx Arbitration
Data Link Control
and Management
State Machine
Control
& Status
Configuration Space
Tx Flow Control Credits
Rx Flow Control Credits
Rx Transation Layer
Packet Description & Data
Power
Management
Function