Ametek Sorensen XG - Status Registers Model from Ieee 488.2; Egister M Odel

Remote Operation
M370430-01 Rev B 5-31
5
Status Registers Model from IEEE 488.2
The IEEE 488.2 registers shown in the bottom rectangle of Figure 5-16
follow the IEEE 488.2 model for status registers. The IEEE 488.2
register only has enable registers for masking the summary bits. Figure
5-19 shows the details on the relationship between the mask/enable
registers and the summary bits. Sections describing the bits for both
registers will follow Figure 5-19.
Figure 5-19 IEEE 488.2 Register Model
Error/Event Queue Status Flag
QUEStionable SCPI Register
Summary Bit
OPERational SCPI Register
Summary Bit
Standard
Event
Status
Register
(SESR)
SESR
Summary
Bit
SERS
Enable
Register
Status Byte
Enable Register
Status Byte
Register
MSS
Summary
Bit