48
7647H–AVR–03/12
Atmel ATmega16/32/64/M1/C1
Figure 7-2. MCU Start-up, RESET Tied to V
CC
Figure 7-3. MCU Start-up, RESET
Extended Externally
7.2.2 External Reset
An External Reset is generated by a low level on the RESET
pin. Reset pulses longer than the
minimum pulse width (see Table 7-1) will generate a reset, even if the clock is not running.
Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the
Reset Threshold Voltage – V
RST
– on its positive edge, the delay counter starts the MCU after
the Time-out period – t
TOUT
–
has expired.
Figure 7-4. External Reset During Operation
RESET
TIME-OUT
INTERNAL
RESET
t
TOU T
V
RST
V
V
CC
CCRR
V
V
PORMIN
PORMAX
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
V
CC