84
Z31980_00_03
Configuration
6. Verify that the new version has been correctly loaded by reading register 0x04 (see
above).
7.3.2 Main Board
The main board requires an external tool to stream the FPGA content, since the memory
of the embedded web server CPU is not large enough to hold an entire FPGA image.
The procedure is therefore different (and simpler) but does need a special software tool
called Allegro Flash Tool (Flash.exe).
i
Notice: Before a start the current FPGA version must be correctly identified. In the case
of the main board this is seen at the bottom of the main web server page.
2. Begin the update procedure
using main -> support ->
XILINX CPLD/ FPGA Update.
3. Select the corresponding
FPGA image (file ending
*.xsfv) and press Upload
Xilinx XSVF-File.
This takes a few seconds and is fin-
ished when the Start window
appears.
4. Press Start. This procedure
takes about 25 minutes !!!
It is finished when this message
appears.
5. Reset the CPU by pressing the
Hardware Reset button in the
menu
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