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dSPACE DS1103 Hardware Installation And Configuration

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Mapping of I/O Signals
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DS1103 Hardware Installation and Configuration March 2004
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SXF Bit 12 Group 3
bit 2
P2 83 P2B 31 CP31 18
SBIO Bit 13 Group 3
bit 3
P2 84 P2A 31 CP31 36
SCAP1 * Bit 14 Group 3
bit 4
P2 77 P2B 30 CP31 2
SCAP2 * Bit 15 Group 3
bit 5
P2 78 P2A 30 CP31 21
SCAP3 * Bit 16 Group 3
bit 6
P2 79 P2B 14 CP31 3
SCAP4 * Bit 17 Group 3
bit 7
P2 80 P2A 14 CP31 22
ST1PWM * _ Group 2
bit 3
P2 59 P2B 27 CP31 23
Slave DSP Timing I/O Unit
TTL output voltage range
Output current range: ±13 mA
ST2PWM * DS1103SL_DSP_PWM Ch 1 See Slave DSP PWM
Generation in the DS1103
RTLib Reference
Ch 1 P2 60 P2A 27 CP31 5
SPWM7 * Ch 2 Ch 2 P2 71 P2B 29 CP31 10
SPWM8 * Ch 3 Ch 3 P2 72 P2A 29 CP31 29
SPWM9 * Ch 4 Ch 4 P2 73 P2B 13 CP31 11
SPWM1 * DS1103SL_DSP_PWM3 /
DS1103SL_DSP_PWMSV
Phase 1 See Slave DSP PWM3
Generation /
Slave DSP PWMSV
Generation in the DS1103
RTLib Reference
Phase 1 P2 65 P2B 28 CP31 7
SPWM3 * Phase 2 Phase 2 P2 67 P2B 12 CP31 8
SPWM5 * Phase 3 Phase 3 P2 69 P2B 45 CP31 9
SPWM2 Phase 1
(inverted)
Phase 1
(inverted)
P2 66 P2A 28 CP31 26
SPWM4 Phase 2
(inverted)
Phase 2
(inverted)
P2 68 P2A 12 CP31 27
SPWM6 Phase 3
(inverted)
Phase 3
(inverted)
P2 70 P2A 45 CP31 28
ST1PWM * DS1103SLAVE_PWMINT See
ds1103_slave_dsp_pwm3_int
_init in the DS1103 RTLib
Reference
P2 59 P2B 27 CP31 23
Slave DSP Square-Wave Signal Generation (D2F)
TTL output voltage range
Output current range: ±13 mA
SPWM1 * DS1103SL_DSP_D2F Ch 1 See Square Wave Signal
Generation (D2F) in the
DS1103 RTLib Reference
Ch 1 P2 65 P2B 28 CP31 7
SPWM3 * Ch 2 Ch 2 P2 67 P2B 12 CP31 8
SPWM5 * Ch 3 Ch 3 P2 69 P2B 45 CP31 9
ST2PWM * Ch 4 Ch 4 P2 60 P2A 27 CP31 5
Signal
Channel/Bit Numbers of Related RTI Blocks/RTLib Functions I/O Pin on
Related RTI Block(s)
Ch/Bit
(RTI)
Related RTLib Functions
Ch/Bit
(RTLib)
DS1103
Sub-D
Conn.
CP/CLP

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dSPACE DS1103 Specifications

General IconGeneral
BranddSPACE
ModelDS1103
CategoryController
LanguageEnglish

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