FIMER_PVS-175-TL A.1 Version_Product manual_EN_RevC-
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Based on the above conditions, the Leds behaviour is described in the table below:
POWER ALARM GFI
Arc Fault pending OFF ON ON
Self Test Failed OFF ON Blinking (200ms period)
Press and hold the AFD reset button (57) on the right side of the DC wiring box for 5 seconds. This
will clear the E050 error and restart the self test. If self-test results are OK, the inverter will reconnect
to the AC grid; if the DC arc fault is still present, the inverter will result in error E050.
NOTE – D Refer to the dedicated paragraph on chapter 8 for troubleshooting suggestions.
The AFD self-test can be manually started anytime using the following procedure:
1. Turn off the inverter (switching off both DC and AC switches),
2. Turn on both the DC and AC switches and wait for self-test result.
If the AFD trips frequently, it means arcs are occurring. Turn the inverter OFF and request service to
do complete check of the system wiring, including all connections and junction boxes, to locate the
problem.
NOTE – D Arc fault can be enabled or disabled through Web UI or other interfaces.
Anti-PID board: Principle of Operation
Anti-PID function is provided as an additional function only for dedicated inverter models.
Alternatively it can be added to other invrerter models as an additional kit.
The optional Anti-PID board offered on the PVS-175 is based on a recovery method.
When installed since the initial commissioning of the system, the proposed solution can effectively
prevent the build-up of any PID (Potential Induced Degradation) phenomena for solar panels and
associated yield losses. In this way it is possible to avoid solar panel efficiency degradation.
Below main aspects of the Anti-PID board and principle of operation are briefly described.
Scope:
Polarization of the PV array terminals to an adjustable and regulated positive potential with respect
to ground when the inverter is off-line (not connected to the AC grid, ensuring that maximum system
voltage (i.e. 1500Vdc) is not exceeded on any part of the PV array.
Main functions:
•
String polarization through the application of a limited current source voltage bias (< 30mA)
adjustable in pre-defined steps up to 800Vdc (500Vdc, 650Vdc, 800Vdc);
• Continuous measurement of the potential of the positive and negative terminal of the arrays with
respect to ground;
•
Run-time monitoring of all relevant parameters and Anti-PID board operating status, including
dedicated alarms generated by the board;
• Possibility to enable and disable the Anti-PID function « On demand » by external commands or
by dedicated Web User Interface (UI).
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