Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS
16 Revision 1.8
Intel Order Number: E14960-009
Table 3. Processor Support Matrix
Process Name Socket Core Frequency Cache size FSB Frequency
Intel
®
Xeon
®
processor
3000 series
Intel
®
LGA775
1.86 GHz –
2.66 GHz
2 MB or 4 MB 1066 MHz
Intel
®
Xeon
®
processor
3100 series
Intel
®
LGA775 TBD TBD 1333 MHZ
Intel
®
Xeon
®
processor
3200 series
Intel
®
LGA775
2.13 GHz –
2.40 GHz
8 MB 1066 MHz
Intel
®
Xeon
®
processor
3300 series
Intel
®
LGA775 TBD TBD 1333 MHZ
3.2 Intel
®
3200/3210 Chipset
The server board is designed around the Intel
®
3200/3210 Chipset. The chipset provides an
integrated I/O bridge and memory controller, and a flexible I/O subsystem core (PCI Express*).
The chipset consists of three primary components.
3.2.1
Intel
®
3200/3210 Chipset MCH: Memory Control Hub
The Intel
®
3200/3210 Chipset is designed for use with Intel
®
processors in a UP server platform.
The role of the MCH in the system is to manage the flow of information between its four
interfaces:
Processor Interface (FSB)
System Memory Interface (DDR2)
DMI interface to the Intel
®
ICH9R South Bridge
PCI Express* connectivity to one or two PCI Express* x8 connectors
The feature list of the MCH includes:
Processor / Host Interface
o Supports LGA775 processors in an UP System configuration
o 200/266/333 MHz FSB Clock frequency
o GTL+ bus drivers with integrated GTL termination resistors
System Memory Controller
o Supports 512 Mbit and 1 Gbit memory technologies
o DDR2 – 667, 800 MHz
o 8 GB addressable memory
o Supports unbuffered, ECC and non-ECC DIMMs
o No support for DIMMs less than 512 MB and memory speeds less than 667 MHz
DMI Interface
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