Intel® Server Boards S3200SH/S3210SH TPS Error Reporting and Handling
Revision 1.8 81
Intel Order Number: E14960-009
Green bits = 1100b = Ch
Since the red bits correspond to the upper nibble and the green bits correspond to the lower
nibble, the two are concatenated to be ACh.
Table 44. POST Progress Code LED Example
8h 4h 2h 1h
LEDs Red Green Red Green Red Green Red Green
ACh 1 1 0 1 1 0 0 0
Result Amber Green Red Off
MSB LSB
Figure 34. Example of Diagnostic LEDs on Server Board
5.2.2 POST Code Checkpoints
Table 45. POST Code Checkpoints
Diagnostic LED Decoder
G=Green, R=Red, A=Amber
Checkpoint
MSB LSB
Description
Host Processor
0x10h Off off off R Power-on initialization of the host processor (bootstrap processor)
0x11h Off Off Off A Host processor cache initialization (including AP)
0x12h Off Off G R Starting application processor initialization
0x13h Off Off G A SMM initialization
Chipset
0x21h OFF OFF R G Initializing a chipset component
Memory
0x22h OFF OFF A OFF Reading configuration data from memory (SPD on DIMM)
0x23h OFF OFF A G Detecting presence of memory
0x24h OFF G R OFF Programming timing parameters in the memory controller
0x25h OFF G R G Configuring memory parameters in the memory controller
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