The 81150A and 81160A use a 64-bit phase accumulator which yields 2
-64
x 2
GHz or 2.7 picohertz for 81150A (2
-64
x 2.5 GHz or 3.4 picohertz for 81160A)
frequency resolution internally.
Only the 14 or 19 (values of the 81150A) most-significant bits of the Phase
Register are used to address waveform memory. Therefore, when
synthesizing low frequencies (less than 122,07 kHz for a typical, 16K point
waveform), the address will not change in every clock cycle. However, at
higher frequencies (greater than 122,07 kHz), the address will change by
more than one location during each clock cycle and some points will be
skipped. If too many points are skipped, a phenomenon known as “aliasing”
will occur and the waveform output will become somewhat distorted.
The Nyquist Sampling Theorem states that in order to prevent aliasing, the
highest frequency component of the desired output waveform must be less
than half of the sampling frequency (2 GHz for the 81150A / 2.5 GHz for the
81160A).
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