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9 MULTIPLE CPU DEDICATED INSTRUCTIONS
9.2 Reading from the CPU Shared Memory of Another CPU
■DFRO
• Reads the data of (n32) words from the CPU shared memory address designated by n2 of the CPU module designated
by n1, and stores that data into the area starting from the device designated by (D).
• When 0 is specified in n3 as the number of data to be read, no processing is performed.
• The number of data to be read changes depending on the target CPU module.
• An instruction which has been executed will result in non-processing if it fails to access the target module because the
module is faulty or busy in processing.
Read of data from the CPU shared memory can also be performed using the intelligent function module
devices.
For intelligent function module device, refer to the User's Manual (Function Explanation, Program
Fundamentals) for the CPU module used.
• In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
• The following program stores 10 points of data from address C0H of the CPU shared memory of CPU No. 2 into the area
starting from D0 when X0 is turned ON.
• The following program stores 20 points of data from address 10000 of the CPU shared memory of CPU No. 4 into the area
starting from D0 when X0 is turned ON.
CPU module Number of read points
Basic model QCPU 1 to 256
Universal model QCPU 1 to 7168
Error
code
Error details Q00J/
Q00/
Q01
QnH QnPH QnPRH QnU LCPU
2110 No CPU module is installed at the position specified for the head I/O number
of the CPU module.
4101 The head of the CPU shared memory address (n2) which performs reading
is outside the CPU shared memory range.
The address of the CPU shared memory (n2) which performs reading + the
number of read points (n3) is outside the CPU shared memory range.
The read data storage device number (D) plus the number of read points
(n3) is outside the specified device range.
When the head of the CPU shared memory address (n2) which performs
reading is an invalid value. (4097 to 9999)
[Ladder Mode] [List Mode]
[Ladder Mode] [List Mode]
n3
CPU shared memory of the
designated CPU (n1)
n
2
Device memory
D
Reads the data
of (n3 2)
words
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