Mitsubishi Electric MELSEC-Q/L - Page 876

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10 MULTIPLE CPU HIGH-SPEED TRANSMISSION DEDICATED INSTRUCTIONS
10.2 Writing Devices to Another CPU
Operation error
• In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
• In any of the following cases, the instruction is completed abnormally, and an error code is stored into a device specified at
completion status storage device ((S1)+0).
Program example
• This program stores data by 10 words starting from D0 in host CPU into W10 or later in CPU No.2 when X0 turns on.
Error
code
Error details Q00J/
Q00/
Q01
QnH QnPH QnPRH QnU LCPU
4350 Specified another CPU is incorrect. Or the multiple CPU high-speed
transmission dedicated instruction is disabled.
• The reserved CPU has been specified.
• A CPU that is not mounted has been specified.
• Another CPU start I/O number divided by 16n is not within the range from
3E0H to 3E3H.
• The instruction was executed when the module is set to "Do not use
multiple CPU high speed transmission".
• The instruction was executed with the CPU module that cannot use this
instruction.
• The host CPU has been specified.
• The CPU where the instruction cannot be executed has been specified.

4351 Another CPU does not support this instruction. 
4352 The number of devices is incorrect. 
4353 The device that cannot be used for the instruction has been specified. 
4354 A device has been specified by the character string that cannot be used. 
4355 The number of write points, ((S1)+1), is other than 0 to 100. 
Error
code
Error details Q00J/
Q00/
Q01
QnH QnPH QnPRH QnU LCPU
0010H The request of the instruction to the target CPU is more than the acceptable
value. (No empty block exists in the multiple CPU high speed transmission
area.)

1001H A device of another CPU specified in (D1) cannot be used for the CPU, or is
outside the device range.

1003H The response of the instruction from another CPU cannot be returned. (No
empty block exists in the multiple CPU high speed transmission area.)

1080H The number of write points set with the D(P).DDWR instruction is 0. 
[Ladder Mode] [List Mode]