Saia-Burgess Controls AG
Hardware manual for PCD3 series │ Document 26-789 ENG19│ 2018-06-29
Addressing
Guidance
2-10
2
2.7 Addressing
The address of an I/O slot module is determined by its module slot in the
conguration.
Each PCD3 I/O slot module has 16 addresses (numbered from 0 to 15),
regardless of the actual number of inputs / outputs (16, 8, 6 or 4).
CPU: CPUs serve LIOs as well as RIOs.
The addressing of the modules on a CPU looks like this:
Module slot 0 has the base address 0 (zero)
Module slot 1 has the base address 16
Module slot 2 has the base address 32
Module slot 3 has the base address 48
Each slot provides 16 addresses, regardless of the number of inputs /
outputs (16, 8, 6 or 4) per module. Additionally, 64 addresses are
available for the 4 slots.
RIOs: RIOs are module carriers with standalone functions and are detatched
from the CPU through a network.
There is no direct access to the I/Os.
ThecongurationoftheRIOiscommunicated(dened)bythePG5
networkconguratoroftheCPU.
RIOs receive their function from the CPU over the network and can
use LIOs.
Addressing:
For addressing, the same applies as described under CPU.
LIOs: LIOs are supplementary module carriers (PCD3.C100 / C110 / C200)
to a CPU or a RIO, thus expanding the number of module slots.
The address of the slot module is determined by the base address of
themodulecarrierwithinacongurationanditslocationonthemodule
carrier itself.
Addressing:
Module slot number >= 4
I/O base address >= 64