RM0440 Rev 4 103/2126
RM0440 Embedded Flash memory (FLASH) for category 3 devices
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Standard programming
The Flash memory programming sequence in standard mode is as follows:
1. Check that no Flash main memory operation is ongoing by checking the BSY bit in the
Flash status register (FLASH_SR).
2. Check and clear all error programming flags due to a previous programming. If not,
PGSERR is set.
3. Set the PG bit in the Flash control register (FLASH_CR).
4. Perform the data write operation at the desired memory address, inside main memory
block or OTP area. Only double word can be programmed.
– Write a first word in an address aligned with double word
– Write the second word
5. Wait until the BSY bit is cleared in the FLASH_SR register.
6. Check that EOP flag is set in the FLASH_SR register (meaning that the programming
operation has succeed), and clear it by software.
7. Clear the PG bit in the FLASH_SR register if there no more programming request
anymore.
Note: When the flash interface has received a good sequence (a double word), programming is
automatically launched and BSY bit is set. The internal oscillator HSI16 (16 MHz) is enabled
automatically when PG bit is set, and disabled automatically when PG bit is cleared, except
if the HSI16 is previously enabled with HSION in RCC_CR register.
If the user needs to program only one word, double word must be completed with the erase
value 0xFFFF FFFF to launch automatically the programming.
ECC is calculated from the double word to program.
Fast programming for a row (64 double words if DBANK=1) or for half row (64
double words if DBANK=0)
This mode allows to program a row (64 double words if DBANK=1) or half row (64 double
words if DBANK=0), and to reduce the page programming time by eliminating the need for
verifying the flash locations before they are programmed and to avoid rising and falling time
of high voltage for each double word. During fast programming, the CPU clock frequency
(HCLK) must be at least 8 MHz.
Only the main memory can be programmed in Fast programming mode.
The Flash main memory programming sequence in standard mode is as follows:
1. In single bank mode (DBANK=0), perform a mass erase. If not, PGSERR is set. The
Fast programing can be performed only if the code is executed from RAM or from
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