RM0440 Rev 4 87/2126
RM0440
91
Execution can be performed from CCM SRAM with maximum performance without any
remap thanks to access through ICode bus.
The CCM SRAM is aliased at address following the end of SRAM2 (0x2000 5800 for
category 2 devices, 0x2001 8000 for category 3 devices, 0x2001 8000 for category 4
devices), offering a continuous address space with the SRAM1 and SRAM2.
2.4.1 Parity check
On the Category 3 and Category 4 devices, a parity check is implemented on the first
32 Kbytes of SRAM1 and on the whole CCM SRAM.
On the Category 2 devices, a parity check is implemented on the whole SRAM1 and CCM
SRAM.
The user can enable the parity check using the option bit SRAM_PE in the user option byte
(refer to Section 3.4.1: Option bytes description).
The data bus width is 36 bits because 4 bits are available for parity check (1 bit per byte) in
order to increase memory robustness, as required for instance by Class B or SIL norms.
The parity bits are computed and stored when writing into the SRAM. Then, they are
automatically checked when reading. If one bit fails, an NMI is generated. The same error
can also be linked to the BRK_IN Break input of TIM1/TIM8/TIM15/TIM16/TIM17/TIM20,
and to hrtim_sys_flt with the SPL control bit in the Section 10.2.8: SYSCFG configuration
register 2 (SYSCFG_CFGR2). The SRAM Parity Error flag (SPF) is available in the
Section 10.2.8: SYSCFG configuration register 2 (SYSCFG_CFGR2).
Note: When enabling the SRAM parity check, it is advised to initialize by software the whole
SRAM memory at the beginning of the code, to avoid getting parity errors when reading
non-initialized locations.
2.4.2 CCM SRAM Write protection
The CCM SRAM can be write protected with a page granularity of 1 Kbyte.
Table 4. CCM SRAM organization
Page number Start address End address
Page 0 0x1000 0000 0x1000 03FF
Page 1 0x1000 0400 0x1000 07FF
Page 2 0x1000 0800 0x1000 0BFF
Page 3 0x1000 0C00 0x1000 0FFF
Page 4 0x1000 1000 0x1000 13FF
Page 5 0x1000 1400 0x1000 17FF
Page 6 0x1000 1800 0x1000 1BFF
Page 7 0x1000 1C00 0x1000 1FFF
Page 8 0x1000 2000 0x1000 23FF
Page 9 0x1000 2400 0x1000 27FF
Page 10
(1)
0x1000 2800 0x1000 2BFF
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