Inter-integrated circuit (I2C) interface RM0440
1864/2126 RM0440 Rev 4
suppression of spikes with a pulse width up to 50 ns in Fast-mode and Fast-mode Plus. The
user can disable this analog filter by setting the ANFOFF bit, and/or select a digital filter by
configuring the DNF[3:0] bit in the I2C_CR1 register.
When the digital filter is enabled, the level of the SCL or the SDA line is internally changed
only if it remains stable for more than DNF x I2CCLK periods. This allows spikes with a
programmable length of 1 to 15 I2CCLK periods to be suppressed.
Caution: Changing the filter configuration is not allowed when the I2C is enabled.
Table 376. Comparison of analog vs. digital filters
- Analog filter Digital filter
Pulse width of
suppressed spikes
≥ 50 ns
Programmable length from 1 to 15 I2C peripheral
clocks
Benefits Available in Stop mode
– Programmable length: extra filtering capability
vs. standard requirements
– Stable length
Drawbacks
Variation vs. temperature,
voltage, process
Wakeup from Stop mode on address match is not
available when digital filter is enabled
To Next Page
Loading...
Need help?
General
