Universal synchronous/asynchronous receiver transmitter (USART/UART) RM0440
1642/2126 RM0440 Rev 4
Determining the maximum USART baud rate that enables to correctly wake
up the microcontroller from low-power mode
The maximum baud rate that enables to correctly wake up the microcontroller from low-
power mode depends on the wakeup time parameter (refer to the device datasheet) and on
the USART receiver tolerance (see Section 37.5.8: Tolerance of the USART receiver to
clock deviation).
Let us take the example of OVER8 = 0, M bits = ‘01’, ONEBIT = 0 and BRR [3:0] = 0000.
In these conditions, according to Table 345: Tolerance of the USART receiver when BRR
[3:0] = 0000, the USART receiver tolerance equals 3.41%.
DTRA + DQUANT + DREC + DTCL + DWU < USART receiver tolerance
D
WUmax
= t
WUUSART
/ (11 x T
bit Min
)
T
bit Min
= = t
WUUSART
/ (11 x D
WUmax
)
where t
WUUSART
is the wakeup time from low-power mode.
If we consider the ideal case where DTRA, DQUANT, DREC and DTCL parameters are at
0%, the maximum value of DWU is 3.41%. In reality, we need to consider at least the
usart_ker_ck inaccuracy.
For example, if HSI16 is used as usart_ker_ck, and the HSI16 inaccuracy is of 1%, then we
obtain:
t
WUUSART
= 3 µs (values provided only as examples; for correct values, refer to the
device datasheet).
D
WUmax
= 3.41% - 1% = 2.41%
T
bit min
= 3 µs/ (11 x 2.41%) = 11.32 µs.
As a result, the maximum baud rate that enables to wakeup correctly from low-power
mode is: 1/11.32 µs = 88.36 Kbaud.
37.6 USART interrupts
During USART communications, an interrupt (usart_it) can be generated by different events.
The USART block can also generate a wakeup interrupt (usart_wkup).
Refer to Table 348 for a detailed description of all USART interrupt requests.
Table 348. USART interrupt requests
Interrupt event
Event
flag
Enable
Control
bit
Interrupt clear method
Interrupt activated
usart_it usart_wkup
Transmit data register empty TXE TXEIE
TXE cleared when a data is
written in TDR
YES NO
Transmit FIFO Not Full TXFNF TXFNFIE
TXFNF cleared when TXFIFO
is full.
YES NO
Transmit FIFO Empty TXFE TXFEIE
TXFE cleared when the
TXFIFO contains at least one
data or by setting TXFRQ bit.
YES YES