ST STM32G431 User Manual

Low-power timer (LPTIM) RM0440
1476/2126 RM0440 Rev 4
Figure 499. Encoder mode counting sequence
32.4.15 Debug mode
When the microcontroller enters debug mode (core halted), the LPTIM counter either
continues to work normally or stops, depending on the DBG_LPTIM_STOP configuration bit
in the DBG module.
32.5 LPTIM low-power modes
MS32491V1
T1
Counter
up updown
T2
Table 315. Effect of low-power modes on the LPTIM
Mode Description
Sleep No effect. LPTIM interrupts cause the device to exit Sleep mode.
Low-power run No effect.
Low-power sleep
No effect. LPTIM interrupts cause the device to exit the Low-power sleep
mode.
Stop 0 / Stop 1
No effect when LPTIM is clocked by LSE or LSI. LPTIM interrupts cause
the device to exit Stop 0 and Stop 1.
Standby
The LPTIM peripheral is powered down and must be reinitialized after
exiting Standby or Shutdown mode.
Shutdown

ST STM32G431 Specifications

General

Brand	ST
Model	STM32G431
Category	Microcontrollers
Language	English