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ST STM32G431 User Manual

ST STM32G431
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RM0440 Rev 4 881/2126
RM0440 High-resolution timer (HRTIM)
1083
Figure 210. Interleaved up-down counter operation
Note: In up-down counting mode, the compare values must be 3 periods of the fHRTIM clock
below the period value (TIMx_PER - 0xC0 if CKPSC[2:0] = 0, TIMx_PER - 0x60 if
CKPSC[2:0] = 1, TIMx_PER - 0x30 if CKPSC[2:0] = 2,...). This applies for the compare
events generated inside the timing unit. For compare events generated in other timing units,
it is mandatory to avoid any event occurring within less than 1 period of the fHRTIM clock of
a counter direction change (counter at 0, period event or counter reset).
The following features are supported in up-down counting mode:
–Half mode
Deadtime insertion
Push-pull mode, alternance push-pull done on when counter = 0 (see Figure 211).
Delayed Idle
Burst mode
PWM mode with “greater than” comparison (see Figure 212).
Figure 211. Push-pull up-down mode example
MSv47420V2
HRTIM_CHy1
TimA
HRTIM_CHx1
TimB
Shorten pulse
on TB1 on
TimB counter
reset
MSv50806V1
HRTIM_CHx2
HRTIM_CHx1
Set on CMP1
Reset on CMP2

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ST STM32G431 Specifications

General IconGeneral
SeriesSTM32G4
CoreARM Cortex-M4
Max Clock Frequency170 MHz
Flash Memory128 KB
GPIO PinsUp to 51
Operating Voltage1.71 V to 3.6 V
ADC12-bit
DAC12-bit
Communication InterfacesI2C, SPI, USART, CAN
Operating Temperature-40°C to 85°C
PackageUFQFPN48, LQFP48
SRAM32 KB

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