ST STM32G431 User Manual

Embedded Flash memory (FLASH) for category 3 devices RM0440
124/2126 RM0440 Rev 4
3.5.3 Write protection (WRP)
The user area in Flash memory can be protected against unwanted write operations.
Depending on the DBANK option bit configuration, it allows either to specify:
• In single bank mode (DBANK=0): four write-protected (WRP) areas can be defined in
each bank, with page size (4 KByte) granularity.
• In dual bank mode (DBANK=1): two write-protected (WRP) areas can be defined in
each bank, with page (2 KByte) granularity.
Each area is defined by a start page offset and an end page offset related to the physical
Flash bank base address. These offsets are defined in the WRP address registers: Flash
WRP area A address register (FLASH_WRP1AR), Flash WRP area B address register
(FLASH_WRP1BR), Flash Bank 2 WRP area A address register (FLASH_WRP2AR), Flash
Bank 2 WRP area B address register (FLASH_WRP2BR).
Dual bank mode (DBANK=1)
The bank “x” WRP “y” area (x=1,2 and y=A,B) is defined from the address: Bank “x” Base
address + [WRPxy_STRT x 0 x 800] (included) to the address: Bank “x” Base address +
[(WRPxy_END+1) x 0 x 800] (excluded).
Single Bank mode (DBANK=0)
The WRPx “y” area (x=1,2 and y=A,B) is defined from the address: Base address +
[WRPy_STRT x 0 x 1000] (included) to the address: Base address + [(WRPy_END+1) x
0x1000] (excluded).
For example, to protect by WRP from the address 0x0806 2800 (included) to the address
0x0807 07FF (included):
• if boot in flash is done in Bank 1, FLASH_WRP1AR register must be programmed with:
– WRP1A_STRT = 0x62.
– WRP1A_END = 0x70.
WRP1B_STRT and WRP1B_END in FLASH_WRP1BR can be used instead (area “B”
in Bank 1).
• If the two banks are swapped, the protection must apply to bank 2, and
FLASH_WRP2AR register must be programmed with:
– WRP2A_STRT = 0x62.
– WRP2A_END = 0x70.
– WRP2A_STRT = 0xC5.
– WRP2A_END = 0xE0.
WRP2B_STRT and WRP2B_END in FLASH_WRP2BR can be used instead (area “B
in Bank 2).
When WRP is active, it cannot be erased or programmed. Consequently, a software mass
erase cannot be performed if one area is write-protected.
1. When DBANK=1, the minimum PCROP area size is 2xdouble words: PCROPx_offset_strt and
PCROPx_offset_end.
When DBANK=0, the minimum PCROP area size is 2x(2xdouble words): PCROPx_offset_strt and
PCROPx_offset_end.
When DBANK=1, it is the user’s responsibility to make sure no overlapping occurs on the PCROP zones.

ST STM32G431 Specifications

General

Brand	ST
Model	STM32G431
Category	Microcontrollers
Language	English