Service Manual Information
Table 1: 039-0185-xx μATX POST codes, (cont.)
Item no. Module
Displayed POST
code Description
Reserved 8D
Reserved 8E
Reserved 8F
Reserved 90
Reserved 91
Reserved 92
Boot Medium detection 93 Read and store boot partition head and
Final Init 94
Final init for l ast micro details before boot
Special KBC patch
95
Set system speed for boot Setup NumLock status according to
Setup
Boot Attempt 96
Set low stack Boot via INT 19h.
12
Boot FF
Quick POST Codes
Init onboard device 65
Early Initialized the super IO
Reset Video controller
Keyboard controller init
Test the Keyboard
Initialized the mouse
Onboard audio controller initialize if exist
Check the integrity of the ROM, BIOS, and message
Check Flash type and copy flash write/erase routines to
0F000h segments
Check C MOS Circuitry and reset CMOS Program the chipset
registers w ith CMOS values Init onboard clock generator
Early System setup
66
Check the CPU ID and init L1/L2 cache
Initialize first 120 interrupt vectors with SPURIO US_INT_HDLR
and initialize INT 00h-1Fh according to INT_TBL First step
initialize if single CPU onboard.
Re-init KB If support HPM, HPM get initialized here
KBC and CMOS Init
67
Verifies CMOS is working c orrectly
detects bad battery
If failed, load CMOS defaults and load into chipset
Final Initial KBC and setup BIOS data area.
Video Init 68
Read CMOS location 14h to find out type of video in use.
Detect and Initialize Video Adapter.
Test video memo ry, wri te sign-on message to screen.
Setup shadow RAM - Enable shadow according to Setup.
13
8259 Init 69
Init 8259 channel 1 and mask IRQ 9
TDS5000B Read This First 23
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